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M7800 SD Compliance Tester

M7800 SD Compliance Tester

The M7800 is a Linux based Engineering Compliance Tester for Flash memory cards. The Tester supports both parametric and functional testing of standard Flash cards such as MMC cards and SD cards. Recommended by the Secure Digital Association (SDA), the M7800 supports compliance testing for SD1.01, SD1.1 and SD2.0 Specifications including Speed Class Measurement.

All tests are set-up and run through a powerful GUI (Graphical User Interface) which allows user definition of all parameters governing the chosen tests. Outputs of a given test are recorded in both a log file and a CVS formatted Error file which are easily read in a spread sheet program such as Microsoft Excel.

Test functions include DC parametric leakage testing, VCC margining, and speed testing using the SD Speed Class Measurement standards.

SD Command Compliance testing includes drill down testing with user defined loops to isolate and fix compliance command sequences. Testing of user defined commands is also supported.

 

SDA Recommended Yes
Operating System Linux
Compliance Testing SD1.01, SD1.1, SD2.0
Speed Class Performance Testing Yes, Class 2,4,6
Functional Tests R/W, Speed Test
SD Register Watching CID, SCR, CSD, SD Status
Adjustable SD Clock 0-50Mhz
Bus Width 1 and 4Bit
Voltage Support 0-3.6V
TCL Scripting Yes 
Single Command Control Yes
ICC Wave Monitoring Yes
Ethernet Support Yes
MultiUser Support Operator, Supervisor
Customized Scripts Yes
Log Files Standard and Detailed

M7800 Management Software

SD2.0 Compliance Test:


PARAM_VAL:Card:DUT1
PARAM_VAL:Voltage:3300 mV
PARAM_VAL:Bus Width:1-bit
PARAM_VAL:Frequency:400 MHz
TESTSEC_BEGIN:[1]:SD Mode
TESTSEC_BEGIN:[1.1]:General Test
TESTSEC_BEGIN:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
Card supports Hi Speed
Setting to High Frequency Mode
TESTSEC_PASS:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
TESTSEC_END:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
TESTSEC_BEGIN:[1.1.2]:Checking TRAN_SPEED (1-3)
Card supports Hi Speed
TESTSEC_PASS:[1.1.2]:Checking TRAN_SPEED (1-3)
TESTSEC_END:[1.1.2]:Checking TRAN_SPEED (1-3)
 

SD2.0 Compliance Test Detailed:

TESTSEC_PASS:[B]:Force Erase
TESTSEC_END:[B]:Force Erase
PARAM_VAL:Card:DUT1
PARAM_VAL:Voltage:3300 mV
PARAM_VAL:Bus Width:1-bit
PARAM_VAL:Frequency:400 MHz
TESTSEC_BEGIN:[1]:SD Mode
TESTSEC_BEGIN:[1.1]:General Test
TESTSEC_BEGIN:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
SDCMD 0 0 0
- No Response -
SDCMD 8 1AA 0
08000001AA13
SDCMD 55 0 0
370000012083
SDACMD 41 0x40000000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3FC0FF8000FF
SDCMD 2 0 0
3F194459202020202000001001AB0093C9
SDCMD 3 0 0
030002050047
SDCMD 9 0X020000 0
3F400E00325B59000079377F800A400055
SDCMD 7 0X020000 0
070000070075
SDCMD 55 0X020000 0
370000092033
SDACMD 51 0 0
0235000000000000
330000092091
SDCMD 6 ffff01 0
0600000900DD
Card supports Hi Speed
Setting to High Frequency Mode
SDCMD 13 0X020000 0
0D000009003F
SDCMD 6 80ffff01 0
0600000900DD
SDCMD 7 0 0
000000000000
SDCMD 9 0X020000 0
3F400E005A5B59000079377F800A400083
TESTSEC_PASS:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
TESTSEC_END:[1.1.1]:Bus width and Clock Frequency Support (1-1, 1-2)
TESTSEC_BEGIN:[1.1.2]:Checking TRAN_SPEED (1-3)
SDCMD 0 0 0
- No Response -
SDCMD 8 1AA 0
08000001AA13
SDCMD 55 0 0
370000012083
SDACMD 41 0x40000000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3F40FF8000FF
SDCMD 55 0 0
370000012083
SDACMD 41 0X40FF8000 0
3FC0FF8000FF
SDCMD 2 0 0
3F194459202020202000001001AB0093C9
SDCMD 3 0 0
030002050047
SDCMD 9 0X020000 0
3F400E00325B59000079377F800A400055
SDCMD 7 0X020000 0
070000070075
SDCMD 55 0X020000 0
370000092033
SDACMD 51 0 0
0235000000000000
330000092091
SDCMD 6 ffff01 0
0600000900DD
Card supports Hi Speed
SDCMD 13 0X020000 0
0D000009003F
SDCMD 6 80ffff01 0
0600000900DD
SDCMD 7 0 0
000000000000
SDCMD 9 0X020000 0
3F400E005A5B59000079377F800A400083
TESTSEC_PASS:[1.1.2]:Checking TRAN_SPEED (1-3)
TESTSEC_END:[1.1.2]:Checking TRAN_SPEED (1-3)

 

Protocol Examples SD Speedclass Performance Test

Pw Results:
.  Tauw: 481.08299 msec
.  Num FAT Insertions: 22
.  Num Read Insertions: 16
.  Au Number: 8
.  Clock Speed: 20
.  AU Size: 8192
.  RU Size: 128
.  Sau: 4194304
.  Sau + Insertions: 4207616
.  Measured Pw: 8718.46
.  Required Pw: 6000
. Passed Pw
 

Protocol Examples SD Speedclass Performance Test Detailed:

 

Number of Blocks: 32, Start: 0x3ff940, End: 0x3ff95f
000000000000
SDCMD 18 3ff940 0
1200000900D3
SDCMD 12 0 0
0C00000B007F
000000018B39
000000018B39
Time to Read Data = 1011.77 us
Read insertion
Number of Blocks: 8, Start: 0x2334, End: 0x233b
000000000000
SDCMD 18 2334 0
1200000900D3
SDCMD 12 0 0
0C00000B007F
00000001BBA0
00000001BBA0
Time to Read FAT = 1135.68 us
Data Read insertion at index: 4192576
SDCMD 25 3be040 0
190000090031
SDCMD 12 0 0
0C00000C001D
0000000D33B2
Time to Write RU = 8652.02 us
 

M7800 ICC Wave